As semiconductor manufacturing advances to ultra-large scale integration (ULSI), the devices on semiconductor wafers shrink to sub-micron dimension and the circuit density increases to several million transistors per die. In order to accomplish this high device packing density, smaller and smaller feature sizes are required This may include the width and spacing of interconnecting lines and the surface geometry such as corners and edges, of various features.
The requirement of small feature sizes with close spacing between adjacent features requires high resolution photolithographic processes. In general, photolithography utilizes a beam of light, such as U.V. waves, to transfer a pattern from a photolithographic mask onto a photoresist coating through an imaging lens. The mask includes opaque and transparent regions such that the shapes match those of the openings in the resist coating in the desired or predetermined pattern.
One technique currently being investigated for improving the resolution of the photolithographic process is known as phase shift lithography. With phase shift lithography the interference of light rays is used to overcome diffraction and improve the resolution and depth of optical images projected onto a target. In phase shift lithography, the phase of an exposure light at the object is controlled such that adjacent bright areas are formed preferably 180.degree. out of phase with one another. Dark regions are thus produced between the bright areas by destructive interference even when diffraction would otherwise cause these areas to be lit. This technique improves total resolution at the object and allows resolutions as fine as 0.25 .mu.m to occur.
An early patent in this field, U.S. Pat. No. 4,360,586 to Flanders et al, was issued on Nov. 23, 1982 and assigned to MIT. This patent was directed to exposing periodic optical features on an object surface. The features were characterized by a spatial period p. According to the invention, a source of radiant energy of wavelength .lambda. illuminates a surface to be exposed through a mask having a spatial period separated from the surface by a distance approximately Sn=p.sup.2 /n.lambda., where n is an integer greater than one.
With respect to semiconductor fabrication numerous laboratory techniques have been proposed to employ phase shifting in the photopatterning of semiconductor wafers Most of the work in this area has centered around either "Alternating Phase Shifting", "Subresolution Phase Shifting", or "Rim Phase Shifting" experiments. In general, in each of these techniques a phase shift mask or reticle is constructed in repetitive patterns of three distinct layers of material. An opaque layer on the mask provides areas that allow no light transmission therethrough, a transparent layer provides areas which allow close to 100% of light to pass through and a phase shifter layer provides areas which allow close to 100% of light to pass through but phase shifted 180.degree. from the light passing through the transparent areas. The transparent areas and phase shifting areas are situated such that light rays diffracted through each area is canceled out in a darkened area therebetween. This creates the pattern of dark and bright areas which can be used to clearly delineate features of a pattern on a photopatterned wafer.
"Alternating Phase Shifting" as disclosed in [1] is a spatial frequency reduction concept similar to the method disclosed in the Flanders et al patent. It is characterized by a pattern of features alternately covered by a phase shifting layer. "Subresolution Phase Shifting" [2] promotes edge intensity cut off by placing a subresolution feature adjacent to a primary image and covering it with a phase shifting layer. "Rim Phase Shifting" [3] overhangs a phase shifter over a chrome mask pattern.
In general, these phase shifting techniques have not been adapted to large scale semiconductor manufacturing processes. One problem with applying phase shifting lithography into practical use, in manufacturing semiconductors, is the difficulty in reticle mask making, inspection, and repair. The process must be compatible with manufacturing conditions, (i.e. inexpensive, repetitive, clean) and prior art laboratory techniques have not heretofore met these criteria.
A representative state of the art semiconductor laboratory process for making a phase shift mask or reticle is disclosed in reference [4]. This process was also generally disclosed in the Flanders et al patent. This process is shown in FIGS. 1A-1C and is termed a "lift off process".
The "lift off process" may be used to fabricate a reticle on hard copy of an individual drawing for a semiconductor circuit layout. The reticle may then be used directly as a mask in the photopatterning process or may be used to produce a photomask. As an example, this reticle may be used to pattern a wafer surface in a stepped pattern transfer. DRAM's and SRAM's because of their repetitive nature are adapted to manufacture in this manner.
Referring to FIG. 1A, with the "lift off process" a transparent quartz substrate 10 has a film of an opaque light blocking material such as chromium (CR) patterned thereon. The chromium (CR) may be deposited and patterned onto the substrate 10 by a conventional process such as electron beam deposition and photolithography. In the example of FIG. 1A, the pattern is a periodic arrangement of lines 12 of (CR) and spaces 14 patterned to the quartz substrate 10.
A layer of resist 16 is then deposited and patterned over the patterned chromium (CR) lines 12 and spaces 14. Every other space 14 is covered with resist 16 such that an alternating pattern of phase shifters and openings will be ultimately formed. As shown in FIG. 1B the resist 16 is deposited in an overhanging profile such that a subsequent etching process aids the "lift off" step.
With reference to FIG. 1B, after deposition of the resist 16, a film of phase shifter material 18 such as (SiO.sub.2) is blanket deposited over the photoresist 16 and patterned openings 14. The phase shift ultimately obtained is a function of the thickness and refractive index of this phase shifter material 16, which are preferably selected to provide a 180.degree. phase shift.
As shown in FIG. 1(C) the phase shifter film layer 18 (SiO.sub.2) is then "lifted off" the layer of photoresist 16 by etching away the photoresist 16. This leaves a phase shifter 18 in every other opening 14 between the chromium (CR) light blockers 12. This provides an alternating phase shifting pattern as previously explained.
A problem with this "lift off process" is that it is a messy procedure not suitable for large scale manufacturing. Large chunks of (SiO.sub.2) material are lifted by the etching process and are difficult to remove from the finished reticle. These contaminants may cause subsequent contamination of the finished wafer. Additionally with this "lift off process" the surface of the chromium (CR) light blockers 12 and of the phase shifters 18 may be rough and optically irregular.
The process of the present invention is directed to a process for providing a clean, repetitive, technique for forming accurate phase shifting reticles suitable for large scale semiconductor manufacturing. Moreover the process of the invention polishes the phase shifters and light blockers to provide phase shifters with a smooth and optically flawless surface.